1. Field of the Invention.
The present invention relates generally to buffer circuits. In particular, the present invention is a skew compensated RS422 buffer.
2. Description of the Prior Art.
RS422 buffers are commonly used to interface data communication devices to long transmission lines over which data must be transmitted at high rates. A typical RS422 buffer includes two TTL output buffers which are driven or switched one hundred and eighty degrees out of phase with each other to provide complementary output signals. The time skew between positive or rising (i.e. zero-to-one) transistions and negative or falling (i.e. one-to-zero) transitions is a crictical parameter. In general, the lower or smaller the skew, the higher the rate at which data can be accurately transmitted and received.
Asymmetric switching characteristics of the output driver stage of RS422 buffers contribute to overall skew. The inherent difference in the storage time and turn-on time of NPN transistors, for example, results in negative switching transitions which are delayed by a greater amount and thereby skewed from positive switching transitions. Known techniques for minimizing this skew involve using discrete components to control the RC time constant of the switching transistor base drive circuits. Skews can be reduced to three to six nanoseconds using these techniques.
It is evident that there is a continuing need for improved RS422 buffers having reduced skew between rising and falling edges of the complementary output signals. Skews of less than one nanosecond would enable more accurate data communications at higher data rates.